Ridgetop’s nanoDFM technologies apply advanced and patented in-situ test structures and iterative improvements. By providing performance metrics and electrical testing, useful lifetime is increased and yields improved. To do this, the most sensitive circuits must be identified as well as the mechanisms likely to have negative effects
Fabless designers rely on the accuracy of the process design kit (PDK) supplied by the foundry in accounting for the statistical nature of the offset voltages. However, a foundry PDK does not exactly model all choices of devices. At process geometries of 130 nm and below, the designer requires a tool like PDKChek to accurately determine the relevant parameters for the specific devices used in the design (width and length choices). Figure below describes the PDKChek system-level implementation. The ∆VT, ∆R, and ∆C sensors are available, and the inductance sensor is currently being tested.
Ridgetop’s Independent Die-Level Fab Process Monitoring Tools